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Posted 32 mo agoFirst seen 2 d ago
Digital Design Engineer (IC Design)
Posted by SEMRON on 20 February 2024, 975 days ago. Still on their Personio board when we checked 17 min ago.
What the posting is about
Design digital parts of SEMRON's AI accelerator chips. Collaborate with analog and software teams. Analyze and optimize performance, power, and timing. Develop timing constraints. Proficiency in RTL design and scripting required. Experience with Chisel HDL and RISC-V a plus.
Read out of the posting
LevelNot stated
Experience askedNot stated
EmploymentFull time
LocationDresden, DE (primary site)
RemoteNot stated
Visa sponsorshipNot stated
SalaryNot published, and most postings do not
Posted2024-02-20
Found viapersonio, direct from their system
We saw it 32 months after it went up.
The posting, as the company wrote it
Schedule: full-time
Employment: permanent
About the Role
In this role, you will be building the digital part of the SEMRON’s future chip generations.
You will design, verify and optimize digital designs to meet our ambitious performance targets.
What you will do:
Design the digital part of SEMRON’s AI accelerator
Contribute to system architecture exploration efforts
Work closely with analog and software team to exchange requirements and implement them
Conduct power, performance and timing analysis
What you should bring in:
In-depth knowledge in RTL design flow
In-depth knowledge of modern microarchitectures, particularly those of AI accelerators.
Good understanding of the capabilities and limitations of digital design tools.
Good understanding in digital design trade-offs.
Familiarity with low power design techniques.
Helpful but not required:
Experience with the Chisel HDL
Experience in verification
Experience with RISC-V
Copied from SEMRON’s own board, not rewritten. Original ↗
Also open at SEMRON
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