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14 d agofound 2 h ago
Senior Principal Engineer, PD Expert (MCU and derivative devices)
What the posting is about
Lead Physical Design Architecture, interface with TSMC, drive AI initiatives for MCU cost reduction, collaborate with cross-functional teams to ensure physically realizable architecture.
Read out of the posting
Levelsenior
Experience asked18+ years
EmploymentFull time
LocationAustin, TEXAS, United States
RemoteNot stated
Visa sponsorshipNot stated
SalaryNot published, and most postings do not
Posted2026-09-21
Found viasmartrecruiters, direct from their system
We saw it 14 days after it went up.
The posting, as the company wrote it
Employment: Full-time
Experience level: Director
Job Description
This role is a senior technical authority responsible for defining, aligning, and governing Physical Design Architecture, Technology aspects, Foundry selection & PPA. The technologist serves as the primary interface between the internal SoC Physical Design organization and the foundry, systems team  & ensure competitive edge.
Foundry (TSMC) Interface & Ownership
Primary technical point of contact with TSMC for Physical Design.
Technical discussions with foundry team internal and external with regards to foundry selection
Work with foundry & technology to define requirements for signoff & collaterals.
AI Initiative
Lead an AI initiative focusing cost reduction of MCU development
Drive the AI strategy of Physical team in conjunction with methodology teams and external vendors.
 Pilot AI initiatives within organization including scoping, definition & implementation.
Physical Design Architecture Definition and Feasibility
Work with system architects, Architecture team & Chip leads to ensure physically realizable architecture for MCU designs
Drive Physical Partitioning, latency, pipeline planning, IO & AC requirement with leads. 
Align Die-size & PPA targets & KPI for SoC/MCUs
Qualifications
Master’s degree in electrical, Electronics, or Computer Engineering.
18-20+ years of experience in Physical Design with multiple -node tapeouts.
Experience handling MCU designs, Familiarity with Architecture & Design
Additional Information
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our  Diversity & Inclusion Statement .
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
Also open at Renesas
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